1. Field of the Invention
The present invention pertains to the field of integrated circuit device manufacturing processes. More particularly, this invention relates to silicon on insulator processes.
2. Art Background
A prior technique for manufacturing integrated circuit devices involves the formation of devices onto a substrate consisting of a silicon layer disposed on an insulating layer. Such a process may be referred to as a silicon on insulator (SOI) process. Typically, the silicon layer of such a substrate provides a device layer for forming devices such as transistors.
Typically, an SOI process provides reduced substrate capacitance in comparison to other processes. Such reduced substrate capacitance usually improves the quality of transistor devices formed on the substrate. In addition, an SOI process typically provides improved isolation between devices in comparison to other processes. SOI processes are particularly well-suited for manufacturing complimentary metal oxide semiconductor (CMOS) field effect transistors (FET). An SOI process typically facilitates the formation of fully depleted regions for such FETs.
One prior SOI process provides a layer of sapphire as the insulating layer for an SOI substrate. Typically in such a sapphire based SOI process, a silicon layer is epitaxially formed on top of the sapphire layer. The combination of the sapphire layer the silicon epitaxial layer provides an SOI substrate for subsequent formation of devices such as transistors.
Unfortunately, the sapphire required for such an SOI process usually increases the overall manufacturing cost of integrated circuits formed thereon. In addition, the aluminum contained within the sapphire layer may contaminate the silicon epitaxial layer during the high temperature process steps employed during device formation on the substrate. As a consequence, such a sapphire based SOI process usually imposes limits on the available process steps for subsequent device formation. Moreover, an epitaxial formation of silicon on top of a non-silicon substance such as sapphire typically reduces the quality of the silicon layer due to a lattice structure mismatch between the silicon and the sapphire crystal structures.
Another prior SOI process is referred to as the separation by implantation of oxygen (SIMOX) process. The insulating substrate layer in a SIMOX process is typically formed by heating a silicon wafer to a moderate temperature while oxygen is implanted into the silicon wafer at a high energy This implant is subsequently annealed at high temperature to yield a buried layer of oxygen within the silicon wafer. Oxygen precipitates to form the oxide layer which provides a buried insulating layer beneath a silicon device layer.
Unfortunately, SIMOX processes are usually expensive due to the high cost of providing a high current implanter that forms the buried oxide layer. In addition, such high current implantation of oxygen typically requires large amounts of electricity which also increases manufacturing costs. Moreover, SIMOX processes typically require a high temperature anneal step which may cause oxygen precipitates to form outside the buried insulating layer and in the device layer. Such oxygen precipitants located in the device layer typically degrade the performance of transistor devices formed on the device layer.
Yet another prior SOI process is referred to as a bonded etched-back silicon on insulator (BESOI) process. A typical BESOI process begins with a silicon wafer which is subjected to a high dose boron implant to form an etch stop layer. Typically, the etch stop layer is doped with extremely high concentrations of boron in excess of 1E20 per cubic centimeter. An epitaxial layer of silicon is usually grown on top of the etch stop layer. A separate handle wafer having an oxide layer formed thereon is typically bonded to the silicon epitaxial layer. Thereafter, a KOH etching process is usually employed to etch away the lightly doped silicon down to the etch stop layer. An HF nitric acetic chemical process is then used to preferentially etch away the etch stop layer which yields a resulting silicon device layer on an insulating oxide layer.
Unfortunately, such a BESOI process usually creates defects in the resulting wafer film due to the high boron concentrations used in the process. High boron concentrations can cause deformation of the substrate and consequential degradation in the quality of devices formed thereon. In addition, a BESOI process typically requires the formation of an epitaxial silicon layer in addition to an etch stop layer which is later discarded. Such extra process steps in the BESOI process usually increases overall manufacturing costs.